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INTEGRATED CIRCUITS
DATA SHEET
PCF85102C-2; PCF85103C-2 256 x 8-bit CMOS EEPROMs with I2C-bus interface
Product specification File under Integrated Circuits, IC12 2000 Feb 15
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
CONTENTS 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.3.1 8.4 8.4.1 8.4.2 8.5 8.5.1 FEATURES GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION DEVICE SELECTION BLOCK DIAGRAM PINNING Pin description PCF85102C-2 Pin description PCF85103C-2 I2C-BUS PROTOCOL Bus conditions Data transfer Device addressing Remark Write operations Byte/word write Page write Read operations Remark 9 10 11 12 13 14 14.1 14.2 14.2.1 14.2.2 14.3 14.3.1 14.3.2 14.3.3 15 16 17
PCF85102C-2; PCF85103C-2
LIMITING VALUES CHARACTERISTICS I2C-BUS CHARACTERISTICS WRITE CYCLE LIMITS PACKAGE OUTLINES SOLDERING Introduction Through-hole mount packages Soldering by dipping or by solder wave Manual soldering Surface mount packages Reflow soldering Wave soldering Manual soldering DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
2000 Feb 15
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
1 FEATURES
PCF85102C-2; PCF85103C-2
* Low power CMOS: - maximum operating current: 2.0 mA - maximum standby current 10 A (at 6.0 V), typical 4 A. * Non-volatile storage of: - 2 kbits organized as 256 x 8-bit. * Single supply with full operation down to 2.5 V * On-chip voltage multiplier * Serial input/output I2C-bus * Write operations: - byte write mode - 8-byte page write mode (minimizes total write time per byte). * Read operations: - sequential read - random read. * Internal timer for writing (no external components) * Power-on reset * High reliability by using a redundant storage code * Endurance: 1000000 Erase/Write (E/W) cycles at Tamb = 22 C * 10 years non-volatile data retention time * Standard industrial pinning (pin 7 not connected) * Up to sixteen EEPROMs addressable in one I2C-bus using both PCF85102 and PCF85103 in combination. 3 QUICK REFERENCE DATA SYMBOL VDD IDDR PARAMETER supply voltage supply current read fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDDW supply current E/W fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDDstb standby supply current VDD = 2.5 V VDD = 6.0 V - - - - 0.6 2.0 3.5 10 mA mA A A - - 60 200 A A CONDITIONS MIN. 2.5 MAX. 6.0 V UNIT 2 GENERAL DESCRIPTION The PCF85102C-2 and PCF85103C-2 (further referred to as PCF8510xC-2) are 2 kbits (256 x 8-bit) floating gate Electrically Erasable Programmable Read Only Memories (EEPROMs). Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. The PCF8510x-2 is pin compatible to widely used industrial pinning (pin 7 not connected). As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Up to sixteen PCF8510xC-2 devices may be connected to the I2C-bus. This is possible with the introduction of a second device selection code. Chip select is accomplished by three address inputs (A0, A1 and A2) for each PCF8510xC-2 type.
2000 Feb 15
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
4 ORDERING INFORMATION TYPE NUMBER PCF85102C-2P PCF85103C-2P PCF85102C-2T PCF85103C-2T 5 DEVICE SELECTION Device selection code DEVICE CODE b7(1) 1 0 b6 0 0 b5 1 1 b4 0 0 SO8
PCF85102C-2; PCF85103C-2
PACKAGE NAME DIP8 DESCRIPTION plastic dual in-line package; 8 leads (300 mil) plastic small outline package; 8 leads; body width 3.9 mm VERSION SOT97-1 SOT96-1
Table 1
SELECTION Bit PCF85102-C PCF85103-C Note
CHIP ENABLE b3 A2 A2 b2 A1 A1 b1 A0 A0
R/W b0 R/W R/W
1. The Most Significant Bit (MSB) `b7' is sent first.
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VDD 8 SCL SDA 6 5 INPUT FILTER I2C-BUS CONTROL LOGIC n BYTE COUNTER 3 ADDRESS SWITCH SHIFT REGISTER BYTE LATCH (8 bytes) ADDRESS POINTER 4 EE CONTROL ADDRESS HIGH REGISTER SEQUENCER DIVIDER ( 128) 8 EEPROM
6
Philips Semiconductors
256 x 8-bit CMOS EEPROMs with I2C-bus interface
BLOCK DIAGRAM
The pin numbers in this block diagram refer to the PCF85102C-2. For PCF85103C-2, please see Chapter 7.
Fig.1 Block diagram.
handbook, full pagewidth
5
A2 A1 A0 3 2 1
PCF85102C-2; PCF85103C-2
TEST MODE DECODER
TIMER ( 16)
POWER-ON-RESET 7 n.c. 4 VSS
PCF85102C-2; PCF85103C-2
OSCILLATOR
MGL967
Product specification
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
7 PINNING
PCF85102C-2; PCF85103C-2
PCF8510xC-2 has standard industrial pinning which will be compatible for most applications. 7.1 Pin description PCF85102C-2 PIN 1 2 3 4 5 6 7 8 DESCRIPTION address input 0 address input 1 address input 2 negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) not connected positive supply voltage
handbook, halfpage
SYMBOL A0 A1 A2 VSS SDA SCL n.c. VDD 7.2
A0
1
8 V DD 7 n.c. SCL SDA
A1 2
PCF85102C-2
A2 3 VSS 4
MGL968
6 5
Fig.2 Pin configuration PCF85102C-2.
Pin description PCF85103C-2 PIN 1 2 3 4 5 6 7 8 DESCRIPTION address input 0 address input 1 address input 2 negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) not connected positive supply voltage
A1 2 7 n.c. SCL SDA
handbook, halfpage
SYMBOL WP A1 A2 VSS SDA SCL n.c. VDD
WP
1
8 V DD
PCF85103C-2
A2 3 VSS 4
MGL969
6 5
Fig.3 Pin configuration PCF85103C-2.
2000 Feb 15
6
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
8 I2C-BUS PROTOCOL
PCF85102C-2; PCF85103C-2
Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I2C-bus specifications, a low-speed mode (2 kHz clock rate) and a high speed mode (100 kHz clock rate) are defined. The PCF8510xC-2 operates in both modes. By definition, a device that sends a signal is called a `transmitter', and the device that receives the signal is called a `receiver'. The device that controls the signal is called the `master'. The devices that are controlled by the master are called `slaves'. Each byte is followed by one acknowledge bit, which is placed on the bus at a HIGH level by the transmitter. The master generates an extra acknowledge-related clock pulse. The slave receiver that is addressed is obliged to generate an acknowledge after the reception of each byte. The master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull the SDA line down during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Set-up and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master generation of the STOP condition.
The I2C-bus is designed for 2-way, 2-line communication between different ICs or modules. The serial bus consists of two bidirectional lines: one for data signals (SDA), and one for clock signals (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined: * Data transfer may be initiated only when the bus is not busy * During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is HIGH will be interpreted as control signals. 8.1 Bus conditions
The following bus conditions have been defined: * Bus not busy: both data and clock lines remain HIGH. * Start data transfer: a change in the state of the data line, from HIGH-to-LOW, while the clock is HIGH, defines the START condition. * Stop data transfer: a change in the state of the data line, from LOW-to-HIGH, while the clock is HIGH, defines the STOP condition. * Data valid: the state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data. 8.2 Data transfer
Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of the data bytes, transferred between the START and STOP conditions is limited to seven bytes in the E/W mode and eight bytes in the page E/W mode.
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
8.3 Device addressing 8.4 8.4.1
PCF85102C-2; PCF85103C-2
Write operations BYTE/WORD WRITE
Following a START condition, the bus master must output the address of the slave it is accessing. The four MSBs of the slave address are the device type identifier (see Fig.4 and Fig.5). For the PCF85102C-2, this is fixed to `1010', for the PCF85103C-2 to `0010'. The next three significant bits address a particular device or memory page (page = 256 bytes of memory). A system could have up to sixteen PCF8510xC-2 devices on the bus. This can be achieved with eight PCF85102C devices and eight PCF85103C devices, combined on one I2C-bus. The eight addresses are defined by the state of the A0, A1 and A2 inputs per type. The last bit of the slave address defines the operation to be performed. When set to logic 1, a read operation is selected. Address bits must be connected to either VDD or VSS.
For a write operation, the PCF8510xC-2 requires a second address field. This address field is a word address providing access to the 256 words of memory. On receipt of the word address, the PCF8510xC-2 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. The word address is automatically incremented. The master can now terminate the transfer by generating a STOP condition or transmitting up to six more bytes of data and then terminating by generating a STOP condition. After this STOP condition, the E/W cycle starts and the bus is free for another transmission. The duration of the E/W cycle is 10 ms per byte. During the E/W cycle, the slave receiver does not send an acknowledge bit if addressed via the I2C-bus. 8.4.2 PAGE WRITE
handbook, halfpage
1
0
1
0
A2
A1
A0 R/W
MBC793
Fig.4 Slave address for PCF85102C-2.
The PCF8510xC-2 is capable of an 8-byte page write operation. It is initiated in the same manner as the byte write operation. The master can transmit eight data bytes within one transmission. After receipt of each byte, the PCF8510xC-2 will respond with an acknowledge. The typical E/W time in this mode is 9 x 3.5 ms = 31.5 ms. Erasing a block of eight bytes in page mode takes a typical 3.5 ms and sequential writing of these eight bytes another typical 28 ms. After the receipt of each data byte, the three low order bits of the word address are internally incremented. The five high order bits of the address remain unchanged. The slave acknowledges the reception of each data byte with an ACK. The I2C-bus data transfer is terminated by the master after the eighth byte with a STOP condition. If the master transmits more than eight bytes prior to generating the STOP condition, no acknowledge will be given on the ninth (and following) data bytes. Also, the whole transmission will be ignored and no programming will be done. As in the byte write operation, all inputs are disabled until completion of the internal write cycles.
handbook, halfpage
0
0
1
0
A2
A1
A0 R/W
MGL970
Fig.5 Slave address for PCF85103C-2.
8.3.1
REMARK
The I2C-bus device select address `0010' is not exclusively reserved for device PCF85103C-2. Therefore, multiple use has to be checked in advance.
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
PCF85102C-2; PCF85103C-2
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
DATA
A
DATA
A
P
R/W auto increment word address auto increment word address
MBA701
Fig.6 Auto increment memory word address; two byte write.
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
DATA N
A
DATA N + 1
A
R/W auto increment word address auto increment word address
acknowledge from slave
DATA N + 7
1
A
last byte
MBA702
auto increment word address
Fig.7 Page write operation; eight bytes.
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
8.5 Read operations 8.5.1
PCF85102C-2; PCF85103C-2
REMARK
The read operations are initiated in the same way as write operations, with the exception that the LSB of the slave address is set to logic 1. There are three basic read operations; current address read, random read and sequential read sequential read.
The lower eight bits of the word address are incremented after each transmission of a data byte (read or write). The MSB of the word address, which is defined in the slave address, is not changed when the word address count overflows. Thus, the word address overflows from 255 to 0.
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from master
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
S
SLAVE ADDRESS
1A
DATA
A
R/W
at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter
R/W
n bytes auto increment word address
no acknowledge from master
DATA
1
P
last byte
MBA703 - 1
auto increment word address
Fig.8 Master reads PCF8510xC-2 slave after setting word address (write word address; read data).
handbook, full pagewidth
acknowledge from slave
acknowledge from master
no acknowledge from master
S
SLAVE ADDRESS
1A
DATA n bytes
A
DATA last bytes
1
P
R/W
auto increment word address
auto increment word address
MBA704 - 1
Fig.9 Master reads PCF8510xC-2 immediately after first byte (read mode).
2000 Feb 15
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
PCF85102C-2; PCF85103C-2
9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDD VI II IO Tstg Tamb supply voltage input voltage on input pins input current on input pins output current storage temperature ambient temperature Zi > 500 PARAMETER CONDITIONS MIN. -0.3 VSS - 0.8 - - -65 -40 MAX. +6.5 +6.5 1 10 +150 +85 V V mA mA C C UNIT
10 CHARACTERISTICS VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL Supplies VDD IDDR supply voltage supply current read fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDDW supply current E/W fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDDstb standby supply current VDD = 2.5 V VDD = 6.0 V SCL input (pin 6) VIL VIH ILI fSCL Ci VIL VIH VOL ILO Ci tD(ret) LOW-level input voltage HIGH-level input voltage input leakage current clock frequency input capacitance VI = VSS VI = VDD or VSS -0.8 0.7VDD - 0 - -0.8 0.7VDD IOL = 3 mA; VDD(min) - VOH = VDD VI = VSS Tamb = 55 C - - 10 +0.3VDD 6.5 1 100 7 V V A kHz pF - - - - 0.6 2.0 3.5 10 mA mA A A - - 60 200 A A 2.5 6.0 V PARAMETER CONDITIONS MIN. MAX. UNIT
SDA input/output (pin 5) LOW-level input voltage HIGH-level input voltage LOW-level output voltage output leakage current input capacitance +0.3VDD 6.5 0.4 1 7 - V V V A pF
Data retention time data retention time years
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
PCF85102C-2; PCF85103C-2
11 I2C-BUS CHARACTERISTICS All timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing from VSS to VDD; see Fig.10; unless otherwise specified. SYMBOL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT clock frequency bus free time between a STOP and START condition START condition hold time after which first clock pulse is generated LOW-level clock period HIGH-level clock period set-up time for START condition data hold time for bus compatible masters for bus devices tSU;DAT tr tf tSU;STO Note 1. The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by a transmitter. 12 WRITE CYCLE LIMITS Selection of the chip address is achieved by connecting the A0, A1 and A2 inputs to either VSS or VDD. SYMBOL E/W cycle timing tE/W Endurance NE/W E/W cycle per byte Tamb = -40 to +85 C Tamb = 22 C 100000 - - - cycles cycles 1000000 - E/W cycle time internal oscillator - 7 - ms PARAMETER CONDITIONS MIN. TYP. MAX. UNIT data set-up time SDA and SCL rise time SDA and SCL fall time set-up time for STOP condition note 1 5 0 250 - - 4.0 - - - 1 300 - s ns ns s ns s repeated start PARAMETER CONDITIONS 0 4.7 4.0 4.7 4.0 4.7 MIN. - - - - - MAX. 100 UNIT kHz s s s s s
2000 Feb 15
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SDA t BUF t LOW tf t HD;STA
Philips Semiconductors
256 x 8-bit CMOS EEPROMs with I2C-bus interface
P = STOP condition; S = START condition.
Fig.10 Timing requirements for the I2C-bus.
handbook, full pagewidth
13
SCL
P
S
t HD;STA t HIGH
S
P
tr
t HD;DAT
t SU;DAT
t SU;STA
MBA705
t SU;STO
PCF85102C-2; PCF85103C-2
Product specification
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
13 PACKAGE OUTLINES DIP8: plastic dual in-line package; 8 leads (300 mil)
PCF85102C-2; PCF85103C-2
SOT97-1
D seating plane
ME
A2
A
L
A1
c Z e b1 wM (e 1) b2 5 MH
b 8
pin 1 index E
1
4
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001 EIAJ SC-504-8 EUROPEAN PROJECTION
ISSUE DATE 95-02-04 99-12-27
2000 Feb 15
14
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
SO8: plastic small outline package; 8 leads; body width 3.9 mm
PCF85102C-2; PCF85103C-2
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.041 0.228 0.016 0.024
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2000 Feb 15
15
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
14 SOLDERING 14.1 Introduction
PCF85102C-2; PCF85103C-2
Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 14.3.2 WAVE SOLDERING
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 14.2 14.2.1 Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.3.3 MANUAL SOLDERING
The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.2.2 MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. 14.3 14.3.1 Surface mount packages REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 16
2000 Feb 15
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
14.4
PCF85102C-2; PCF85103C-2
Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE suitable(2) not suitable not suitable(3) suitable not recommended(4)(5) not recommended(6) REFLOW(1) DIPPING - suitable suitable suitable suitable suitable suitable - - - - -
Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
15 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCF85102C-2; PCF85103C-2
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 16 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2000 Feb 15
18
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMs with I2C-bus interface
NOTES
PCF85102C-2; PCF85103C-2
2000 Feb 15
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465006/25/01/pp20
Date of release: 2000
Feb 15
Document order number:
9397 750 06682

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